PI: Seonmyeong Bak, MCS
ANL Contact: Yanfei Guo, MCS
Description: Intel has adopted mesh topology since Skylake for its CMP interconnect and it has brought pros and cons on on-chip communication. Many of previous works on scheduling of threads are done on the ring interconnect and small number of NUMA domains. On the mesh interconnect, the previous works on the intra node scheduling of threads may not be valid. This work would be the preliminary work to compare the differences between mesh and ring interconnect in terms of task scheduling.
Testbed: 1 Skylake node, 1 Broadwell node